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IAR Embedded Workbench for Arm 9.70.x

Mode control directives

In this section:
Syntax

ARM

CODE

CODE16

CODE32

DATA

DATA64

THUMB

Description

These directives provide control over the processor mode:

Directive

Description

ARM, CODE32

Subsequent instructions are assembled as 32-bit (Arm) instructions. Labels within a CODE32 area have bit 0 set to 0. Force 4-byte alignment.

CODE

Subsequent instructions are interpreted as Arm or Thumb instructions, depending on the setting of the assembler option ‑‑arm, ‑‑cpu_mode, or ‑‑thumb, or as A64 instructions in AArch64 state, if any of the options ‑‑aarch64, ‑‑abi, or ‑‑cpu_mode a64 have been used.

CODE16

Subsequent instructions are assembled as 16-bit (Thumb) instructions, using the traditional CODE16 syntax. Labels within a CODE16 area have bit 0 set to 1. Force 2-byte alignment.

DATA

Defines an area of data within a code section, where labels work as in a CODE32 area.

DATA64

Defines an area of data within a code section, where labels work as in a CODE32 area. The data area is marked as containing 64-bit data, as a hint for disassemblers.

THUMB

Subsequent instructions are assembled either as 16-bit Thumb instructions, or as 32-bit Thumb-2 instructions if the specified core supports the Thumb-2 instruction set. The assembler syntax follows the Unified Assembler syntax as specified by Arm Limited.

Table 148. Mode control directives


To change between the Thumb and Arm processor modes, use the CODE16/THUMB and CODE32/ARM directives with the BX instruction (Branch and Exchange) or some other instruction that changes the execution mode. The CODE16/THUMB and CODE32/ARM mode directives do not assemble to instructions that change the mode, they only instruct the assembler how to interpret the following instructions.

The use of the mode directives CODE32 and CODE16 is deprecated. Instead, use ARM and THUMB, respectively.

Always use the DATA directive when defining data in a Thumb code section with DC8, DC16, or DC32, otherwise labels on the data will have bit 0 set. Note that there is no way of changing between the Arm or Thumb processor modes to the A64 instruction set in the AArch64 state, or back.

Note

Be careful when porting assembler source code written for other assemblers. The IAR Assembler always sets bit 0 on Thumb code labels (local, external or public). See the chapter Migrating to the IAR Assembler for Arm for details.

The assembler will initially be in Arm mode, except if you specified a core which does not support Arm mode. In this case, the assembler will initially be in Thumb mode.

Example

The following example shows how a Thumb entry to an Arm function can be implemented:

            name    modeChange
            section MYCODE:CODE(2)
            thumb
thumbEntry
            bx      pc              ; Branch to armEntry, and
                                    ; change execution mode.
            nop                     ; For alignment only.
            arm
armEntry
            ; ...

            end

The following example shows how 32-bit labels are initialized after the DATA directive. The labels can be used within a Thumb section.

            name    dataDirective
            section MYCODE:CODE(2)
            thumb
thumbLabel  ldr     r0,dataLabel
            bx      lr

            data                   ; Change to data mode, so
                                   ; that bit 0 is not set
                                   ; on labels.
dataLabel   dc32    0x12345678
            dc32    0x12345678

            end