Skip to main content

IAR Embedded Workbench for Arm 9.70.x

ADR (ARM)

In this section:
Syntax
ADR{condition} register,expression
Parameters

{condition}

Can be one of the following—EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, and AL.

register

The register to load.

expression

A program location counter-relative expression that evaluates to an address that is not word-aligned within the range -247 to +263 bytes, or a word-aligned address within the range -1012 to +1028 bytes. Unresolved expressions (for example expressions that contain external labels, or labels in other sections) must be within the range -247 to +263 bytes.

Description

ADR always assembles to one instruction. The assembler attempts to produce a single ADD or SUB instruction to load the address:

            name    armAdr
            section MYCODE:CODE(2)
            arm
            adr     r0,thumbLabel   ; Becomes "add r0,pc,#1".
            bx      r0

            thumb
thumbLabel  ; ...

            end