Syntax

LDR{condition} register,=expression1

or

LDR{condition} register,expression2

Parameters

Description

The first form of the LDR pseudo-instruction loads a register with any 32-bit expression. The second form of the instruction reads a 32-bit value from an address specified by the expression.

If the value of expression1 is within the range of a MOV or MVN instruction, the assembler generates the appropriate instruction. If the value of expression1 is not within the range of a MOV or MVN instruction, or if the expression1 is unsolved, the assembler places the constant in a literal pool and generates a program-relative LDR instruction that reads the constant from the literal pool. The offset from the program location counter to the constant must be less than 4 Kbytes.

Example

            name    armLdr
            section MYCODE:CODE(2)
            arm
            ldr     r1,=0x12345678  ; Becomes "ldr r1,[pc,#4]":
                                    ; loads 0x12345678 from the
                                    ; literal pool.
            ldr     r2,label        ; Becomes "ldr r2,[pc,#-4]":
                                    ; loads 0xFFEEDDCC into r2.
            data
label       dc32    0xFFEEDDCC
            ltorg                   ; The literal pool is placed
                                    ; here.
            end

See also

LTORG in Assembler control directives.