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IAR Embedded Workbench for RH850 3.20.x

MISRAC2012-Rule-21.25

In this section:
Synopsis

(Required) All memory synchronization operations shall be executed in sequentially consistent order

Enabled by default

Yes

Severity/Certainty

Low/Medium

lowmedium.png
Full description

Use of other than memory_order_seq_cst parameter found.

Coding standards
MISRA C:2012 Rule-21.25

(Required) All memory synchronization operations shall be executed in sequentially consistent order

Code examples

The following code example fails the check and will give a warning:

#include <stdatomic.h>

typedef struct s { 
  short a; 
  short b;
} s_t;

_Atomic s_t astr;

void main( void ) { 
  s_t lstr = atomic_load_explicit( &astr, memory_order_relaxed );  /* Non-compliant */ 
}

The following code example passes the check and will not give a warning about this issue:

#include <stdatomic.h>

typedef struct s { 
  short a; 
  short b;
} s_t;

_Atomic s_t astr;

void main( void ) { 
  s_t lstr = atomic_load( &astr ); /* Compliant */ 
}