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IAR Embedded Workbench for RL78 5.20

SPC-volatile-reads

In this section:
Synopsis

There are multiple read accesses with volatile-qualified type within one and the same sequence point.

Enabled by default

No

Severity/Certainty

Medium/High

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Full description

There are multiple read accesses with volatile-qualified type within one and the same sequence point. There cannot be more than one read access with volatile-qualified type within a sequence point. This check is identical to MISRAC2004-12.2_b, MISRAC++2008-5-0-1_b, MISRAC2012-Rule-13.2_b.

Coding standards
CERT EXP10-C

Do not depend on the order of evaluation of subexpressions or the order in which side effects take place

CERT EXP30-C

Do not depend on order of evaluation between sequence points

CWE 696

Incorrect Behavior Order

MISRA C:2004 12.2

(Required) The value of an expression shall be the same under any order of evaluation that the standard permits.

MISRA C:2012 Rule-13.2

(Required) The value of an expression and its persistent side effects shall be the same under all permitted evaluation orders

MISRA C++ 2008 5-0-1

(Required) The value of an expression shall be the same under any order of evaluation that the standard permits.

Code examples

The following code example fails the check and will give a warning:

void example(void) {
  int x;
  volatile int v;
  x = v + v;
}

The following code example passes the check and will not give a warning about this issue:

int main(void) {
  volatile int i = 0;
  int x = i;  
  i++;
  x = x * i;  //OK - statement is broken up  
  return 0;
}