Summary of intrinsic functions
The IAR C/C++ Compiler for Arm can be used with several different sets of intrinsic functions.
To use the IAR intrinsic functions in an application, include the header file intrinsics.h.
To use the ACLE (Arm C Language Extensions) intrinsic functions in an application, include the header file arm_acle.h. For more information, see Intrinsic functions for ACLE.
To use the Neon intrinsic functions in an application, include the header file arm_neon.h. For more information, see Intrinsic functions for Neon instructions.
To use the MVE intrinsic functions in an application, include the header file arm_mve.h. For more information, see Intrinsic functions for MVE instructions.
To use the CDE intrinsic functions in an application, include the header file arm_cde.h. For more information, see Intrinsic functions for CDE instructions.
To use the CMSIS intrinsic functions in an application, include the main CMSIS header file for your device or core. Note that the CMSIS header files should not be included in the same module as intrinsics.h. For information about CMSIS, see CMSIS integration (32-bit mode).
Note
The intrinsic function names start with double underscores, for example:
__disable_interrupt
Intrinsic functions for ACLE
ACLE (Arm C Language Extensions) specifies a number of intrinsic functions. These are not documented here. Instead, see the Arm C Language Extensions (IHI 0053D).
To use the intrinsic functions for ACLE in an application, include the header file arm_acle.h.
Intrinsic functions for Neon instructions
The Neon co-processor implements the Advanced SIMD instruction set extension, as defined by the Arm architecture. To use Neon intrinsic functions in an application, include the header file arm_neon.h. It can be included from both C and C++. Including it does not enable the IAR extensions if they were disabled. The functions use vector types that are named according to this pattern:
<type><size>x<number_of_lanes>_t
where:
typeisint,unsigned int,float, orpolysizeis8,16,32, or64number_of_lanesis1,2,4,8, or16.
The total bit width of a vector type is size times number_of_lanes, and should fit in a D register (64 bits) or a Q register (128 bits).
For example:
__intrinsic float32x2_t vsub_f32(float32x2_t, float32x2_t);
The intrinsic function vsub_f32 inserts a VSUB.F32 instruction that operates on two 64-bit vectors (D registers), each with two elements (lanes) of 32-bit floating-point type.
Some functions use an array of vector types. As an example, the definition of an array type with four elements of type float32x2_t is:
typedef struct
{
float32x2_t val[4];
}
float32x2x4_t;Intrinsic functions for MVE instructions
The M-profile vector extension (MVE) is defined in the Armv8.1-M architecture. To use Arm MVE intrinsic functions in an application, include the header file arm_mve.h. It can be included from both C and C++. Including it does not enable the IAR extensions if they were disabled. For more information on the MVE intrinsics, see Arm C Language Extensions (document number: 101028). The functions use vector types that are named according to this pattern:
<type><size>x<number_of_lanes>_t
where:
typeisint,unsigned int, orfloatsizeis8,16,32, or64number_of_lanesis1,2,4,8, or16.
The total bit width of a vector type is size times number_of_lanes, and should fit in a Q register (128 bits).
For example:
__intrinsic float32x4_t vsubq_f32(float32x4_t, float32x4_t);
The intrinsic function vsub_f32 inserts a VSUB.F32 instruction that operates on two 128-bit vectors (Q registers), each with four elements (lanes) of 32-bit floating-point type.
Some functions use an array of vector types. As an example, the definition of an array type with four elements of type float32x2_t is:
typedef struct
{
float32x2_t val[4];
}
float32x2x4_t;Intrinsic functions for CDE instructions
ACLE (Arm C Language Extensions) specifies a number of intrinsic functions for use with CDE (Custom Datapath Extension). For information on the CDE intrinsics, see the Custom Datapath Extension section of Arm C Language Extensions (document number: 101028).